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data sheet ?2009-2011 cadeka microcircuits llc www.cadeka.com c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a c omlinear ? clc1008, clc1018, clc2008 0.5ma, low cost, 2.5 to 5.5v, 75mhz rail-to-rail amplifers features n 505a supply current n 75mhz bandwidth n power down to 33a (clc1018) n input voltage range with 5v supply: -0.3v to 3.8v n output voltage range with 5v supply: 0.07v to 4.86v n 50v/s slew rate n 12nv/hz input voltage noise n 15ma linear output current n fully specifed at 2.7v and 5v supplies n replaces ad8031 in v s 5 applications n clc1008: pb-free sot23-5, soic-8 n clc1018: pb-free sot23-6, soic--8 n clc2008: pb-free msop-8, soic-8 applications n portable/battery-powered applications n mobile communications, cell phones, pagers n adc buffer n active flters n portable test instruments n signal conditioning n medical equipment n portable medical instrumentation general description the comlinear clc1008 (single), clc1018 (single with disable), and clc2008 (dual) offer superior dynamic performance with 75mhz small signal bandwidth and 50v/s slew rate. these amplifers use only 505a of supply current and are designed to operate from a supply range of 2.5v to 5.5v (1.25 to 2.75).the combination of low power, high output current drive, and rail-to-rail performance make the clc1008, clc1018, and clc2008 well suited for battery-powered communication/ computing systems. the combination of low cost and high performance make the clc1008, clc1018, and clc2008 suitable for high volume applications in both consumer and industrial applications such as wireless phones, scanners, and color copiers. typical performance examples ordering information part number package pb-free rohs compliant operating temperature range packaging method clc1008ist5x* sot23-5 yes yes -40c to +85c reel clc1008iso8x* soic-8 yes yes -40c to +85c reel clc1018ist6x* sot23-6 yes yes -40c to +85c reel clc1018iso8x* soic-8 yes yes -40c to +85c reel CLC2008IMP8X* msop-8 yes yes -40c to +85c reel clc2008iso8x soic-8 yes yes -40c to +85c reel moisture sensitivity level for all parts is msl-1. *advance information, contact cadeka for availability. magnitude (1db/div) frequency (mhz) 0.1 1 10 100 v o = 1v pp v o = 2v pp v o = 4v pp magnitude (1db/div) frequency (mhz) 0.01 1 100 10 0.1 frequency response vs. v out frequency response vs. temperature
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 2 clc1008 pin assignments pin no. pin name description 1 out output 2 -v s negative supply 3 +in positive input 4 -in negative input 5 +v s positive supply clc1018 pin confguration pin no. pin name description 1 out output 2 -v s negative supply 3 +in positive input 4 -in negative input 5 dis disable pin. enabled if pin is left foating or tied to +v s , disabled if pin is tied to -v s (which is gnd in a single supply application). 6 +v s positive supply clc2008 pin confguration pin no. pin name description 1 out1 output, channel 1 2 -in1 negative input, channel 1 3 +in1 positive input, channel 1 4 -v s negative supply 5 +in2 positive input, channel 2 6 -in2 negative input, channel 2 7 out2 output, channel 2 8 +v s positive supply clc1008 pin confguration clc1018 pin confguration 2 3 5 4 +in +v s -in 1 -v s out - + 2 3 6 4 +in +v s -in 1 -v s out - + 5 dis clc2008 pin confguration 2 3 4 5 6 7 8 out2 +in1 -in2 +in2 1 -in1 out1 -v s +v s preliminary preliminary
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 3 absolute maximum ratings the safety of the device is not guaranteed when it is operated above the absolute maximum ratings. the device should not be operated at these absolute limits. adhere to the recommended operating conditions for proper de - vice function. the information contained in the electrical characteristics tables and typical performance plots refect the operating conditions noted on the tables and plots. parameter min max unit supply voltage 0 6 v input voltage range -v s -0.5v +v s +0.5v v continuous output current -30 30 ma reliability information parameter min typ max unit junction temperature 175 c storage temperature range -65 150 c lead temperature (soldering, 10s) 260 c package thermal resistance 5-lead sot23 221 c/w 6-lead sot23 177 c/w 8-lead soic 100 c/w 8-lead msop 139 c/w notes: package thermal resistance ( q ja ), jdec standard, multi-layer test boards, still air. recommended operating conditions parameter min typ max unit operating temperature range -40 +85 c supply voltage range 2.5 5.5 v
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 4 electrical characteristics at +2.7v t a = 25c, v s = +2.7v, r f = r g =1k, r l = 1k to v s /2, g = 2; unless otherwise noted. symbol parameter conditions min typ max units frequency domain response ugbw ss unity gain -3db bandwidth g = +1, v out = 0.05v pp , r f = 0 65 mhz bw ss -3db bandwidth g = +2, v out < 0.2v pp 30 mhz bw ls large signal bandwidth g = +2, v out = 2v pp 12 mhz gbwp gain bandwidth product g = +11, v out = 0.2v pp 28 mhz time domain response t r , t f rise and fall time v out = 0.2v step; (10% to 90%) 7.5 ns t s settling time to 0.1% v out = 1v step 60 ns os overshoot v out = 1v step 10 % sr slew rate 2v step, g = -1 40 v/s distortion/noise response hd2 2nd harmonic distortion v out = 1v pp , 1mhz -67 dbc hd3 3rd harmonic distortion v out = 1v pp , 1mhz -72 dbc thd total harmonic distortion v out = 1v pp , 1mhz 65 db e n input voltage noise > 10khz 12 nv/hz dc performance v io input offset voltage 0 mv dv io average drift 10 v/c i b input bias current 1.2 a di b average drift 3.5 na/c i os input offset current 30 na psrr power supply rejection ratio (1) dc 60 66 db a ol open-loop gain v out = v s / 2 98 db i s supply current per channel 470 a disable characteristics t on turn on time 0.54 s t off turn off time 4.3 s off iso off isolation 5mhz, r l = 100 58 db i sd disable supply current per channel, dis tied to gnd 15 a input characteristics r in input resistance non-inverting 9 m c in input capacitance 1.5 pf cmir common mode input range -0.3 to 1.5 v cmrr common mode rejection ratio dc, v cm = 0v to v s - 1.5 74 db output characteristics v out output voltage swing r l = 1k to v s / 2 0.09 to 2.53 v r l = 10k to v s / 2 0.05 to 2.6 v i out output current 15 ma i sc short circuit output current 30 ma notes: 1. 100% tested at 25c
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 5 electrical characteristics at +5v t a = 25c, v s = +5v, r f = r g =1k, r l = 1k to v s /2, g = 2; unless otherwise noted. symbol parameter conditions min typ max units frequency domain response ugbw ss unity gain -3db bandwidth g = +1, v out = 0.05v pp , r f = 0 75 mhz bw ss -3db bandwidth g = +2, v out < 0.2v pp 35 mhz bw ls large signal bandwidth g = +2, v out = 2v pp 15 mhz gbwp gain bandwidth product g = +11, v out = 0.2v pp 33 mhz time domain response t r , t f rise and fall time v out = 0.2v step; (10% to 90%) 6 ns t s settling time to 0.1% v out = 1v step 60 ns os overshoot v out = 1v step 12 % sr slew rate 2v step, g = -1 50 v/s distortion/noise response hd2 2nd harmonic distortion v out = 2v pp , 1mhz -64 dbc hd3 3rd harmonic distortion v out = 2v pp , 1mhz -62 dbc thd total harmonic distortion v out = 2v pp , 1mhz 60 db e n input voltage noise > 10khz 12 nv/hz dc performance v io input offset voltage (1) -5 -1 5 mv dv io average drift 10 v/c i b input bias current (1) -3.5 1.2 3.5 a di b average drift 3.5 na/c i os input offset current (1) 30 350 na psrr power supply rejection ratio (1) dc 60 66 db a ol open-loop gain v out = v s / 2 65 80 db i s supply current (1) per channel 505 620 a disable characteristics t on turn on time 0.33 s t off turn off time 5.5 s off iso off isolation 5mhz, r l = 100 58 db i sd disable supply current (1) per channel, dis tied to gnd 33 a input characteristics r in input resistance non-inverting 9 m c in input capacitance 1.5 pf cmir common mode input range -0.3 to 3.8 v cmrr common mode rejection ratio (1) dc, v cm = 0v to v s - 1.5 65 74 db output characteristics v out output voltage swing r l = 1k to v s / 2 (1) 0.2 to 4.65 0.13 to 4.73 v r l = 10k to v s / 2 0.08 to 4.84 v i out output current 15 ma i sc short circuit output current 30 ma notes: 1. 100% tested at 25c
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 6 typical performance characteristics t a = 25c, v s = +5v, r f = r g =1k, r l = 1k to v s /2, g = 2; unless otherwise noted. frequency response vs. c l frequency response vs. r l non-inverting frequency response inverting frequency response non-inverting frequency response at v s = 5v inverting frequency response at v s = 5v normalized magnitude (1db/div) frequency (mhz) 0.1 1 g = 10 r f = 1k 10 100 g = 5 r f = 1k g = 1 r f = 0 g = 2 r f = 1k normalized magnitude (1db/div) frequency (mhz) 0.1 1 g = -10 r f = 1k 10 100 g = -5 r f = 1k g = -2 r f = 1k g = -1 r f = 1k normalized magnitude (2db/div) frequency (mhz) 0.1 1 g = 10 r f = 2k 10 100 g = 5 r f = 1k g = 1 r f = 0 g = 2 r f = 1k normalized magnitude (1db/div) frequency (mhz) 0.1 1 g = -10 r f = 1k 10 100 g = -5 r f = 1k g = -1 r f = 1k g = -2 r f = 1k magnitude (1db/div) frequency (mhz) 0.1 1 10 100 c l = 100pf r s = 100 c l = 50pf r s = 100 c l = 10pf r s = 0 c l = 20pf r s = 100 + - 1k 1k r s c l r l magnitude (1db/div) frequency (mhz) 0.1 1 10 100 r l = 1k r l = 10k r l = 100
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 7 typical performance characteristics t a = 25c, v s = +5v, r f = r g =1k, r l = 1k to v s /2, g = 2; unless otherwise noted. 2nd & 3rd harmonic distortion frequency response vs. temperature 2nd harmonic distortion vs. v out 3rd harmonic distortion vs. v out frequency response vs. v out open loop gain & phase vs. frequency magnitude (1db/div) frequency (mhz) 0.1 1 10 100 v o = 1v pp v o = 2v pp v o = 4v pp open loop gain (db) frequency (hz) -10 0 10 20 30 -180 -135 -90 -45 0 40 50 60 70 80 90 1k 100 10k 100k 1m 10m 100m open loop phase (deg) gain phase distortion (dbc) output amplitude (v pp ) 0.5 1 1.5 2 1mhz 500khz 100khz 2.5 -90 -80 -70 -60 -50 -40 -30 -20 distortion (db) output amplitude (v pp ) 0.5 1.0 1.5 2.0 1mhz 500khz 100khz 2.5 -90 -80 -70 -60 -50 -40 -30 -20 distortion (dbc) frequency (mhz) 0 1 2 3 4 3rd r l = 1k 5 3rd r l = 150 2nd r l = 150 2nd r l = 1k -90 -80 -70 -60 -50 -40 -30 -20 v o = 1v pp magnitude (1db/div) frequency (mhz) 0.01 1 100 10 0.1
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 8 typical performance characteristics - continued t a = 25c, v s = +5v, r f = r g =1k, r l = 1k to v s /2, g = 2; unless otherwise noted. output swing output voltage vs. output current cmrr psrr cmrr (db) frequency (hz) 100 1k 10k 10m 1m 100k 100m -100 -90 -80 -70 -60 0 -50 -40 -10 -30 -20 psrr (db) frequency (hz) 100 1k 10k 10m 1m 100k 100m -80 -70 -60 -50 -40 0 -30 -20 -10 output voltage (0.5v/div) time (1 s/div) 0 2.7 output voltage (0.6v/div) output current (10ma/div) 50 0 -50 -3 0 3 output voltage (20mv/div) time (10ns/div) output voltage (20mv/div) time (10ns/div) small signal pulse response small signal pulse response at v s = 5v
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 9 typical performance characteristics - continued t a = 25c, v s = +5v, r f = r g =1k, r l = 1k to v s /2, g = 2; unless otherwise noted. enable / disable response large signal pulse response at v s = 5v input voltage noise output voltage (0.5v/div) time (10ns/div) voltage noise (nv/ hz) frequency (mhz) 0.0001 0.001 0.01 0.1 1 10 0 10 30 20 40 50 60 70 output voltage (0.02v/div) time (1 s/div) disable pulse 5v 0v output v in = 0.2v pp sinusoid
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 10 application information general description the clc1008 family are a single supply, general purpose, voltage-feedback amplifers fabricated on a complementary bipolar process. the clc1008 offers 75mhz unity gain bandwidth, 50v/s slew rate, and only 505a supply current. it features a rail-to-rail output stage and is unity gain stable. figures 1, 2, and 3 illustrate typical circuit confgurations for non-inverting, inverting, and unity gain topologies for dual supply applications. they show the recommended bypass capacitor values and overall closed loop gain equations. figure 4 shows the typical non-inverting gain circuit for single supply applicaitons. the common mode input range extends to 300mv below ground in single supply operation. exceeding these values will not cause phase reversal. however, if the input voltage exceeds the rails by more than 0.5v, the input esd devices will begin to conduct. the design uses a darlington output stage. the output stage is short circuit protected and offers soft saturation protection that improves recovery time. + - r f 0.1f 6.8f output g = 1 + ( r f /r g ) input +v s -v s r g 0.1f 6.8f r l figure 1. typical non-inverting gain circuit + - r f 0.1f 6.8f output g = - ( r f /r g ) for optimum input offset voltage set r 1 = r f || r g input +v s -v s 0.1f 6.8f r l r g r 1 figure 2. typical inverting gain circuit + - 0.1uf 6.8uf output g = 1 input +v s -v s 0.1uf 6.8uf r l figure 3. unity gain circuit + - r f 0.1f 6.8f out in +v s + r g figure 4. single supply non-inverting gain circuit for optimum response at a gain of +2, a feedback resistor of 1k is recommended. figure 5 illustrates the clc1008 frequency response with both 1k and 2k feedback resistors. magnitude (1db/div) frequency (mhz) 0.1 1 10 100 g = 2 r l = 1k r f = 1k r f = 2k figure 5. frequency response vs. r f
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 11 enable/disable function (clc1018) the clc1018 offers an active-low disable pin that can be used to lower its supply current. leave the pin foating to enable the part. pull the disable pin to the negative supply (which is ground in a single supply application) to disable the output. during the disable condition, the nominal supply current will drop to below 30a and the output will be at high impedance with about 2pf capacitance. power dissipation power dissipation should not be a factor when operating under the stated 1k ohm load condition. however, applications with low impedance, dc coupled loads should be analyzed to ensure that maximum allowed junction temperature is not exceeded. guidelines listed below can be used to verify that the particular application will not cause the device to operate beyond its intended operating range. maximum power levels are set by the absolute maximum junction rating of 150c. to calculate the junction temperature, the package thermal resistance value theta ja (? ja ) is used along with the total die power dissipation. t junction = t ambient + (? ja p d ) where t ambient is the temperature of the working environment. in order to determine p d , the power dissipated in the load needs to be subtracted from the total power delivered by the supplies. p d = p supply - p load supply power is calculated by the standard power equation. p supply = v supply i rms supply v supply = v s+ - v s- power delivered to a purely resistive load is: p load = ((v load ) rms 2 )/rload eff the effective load resistor (rload eff ) will need to include the effect of the feedback network. for instance, rload eff in figure 3 would be calculated as: r l || (r f + r g ) these measurements are basic and are relatively easy to perform with standard lab equipment. for design purposes however, prior knowledge of actual signal levels and load impedance is needed to determine the dissipated power. here, p d can be found from p d = p quiescent + p dynamic - p load quiescent power can be derived from the specifed i s values along with known supply voltage, v supply . load power can be calculated as above with the desired signal amplitudes using: (v load ) rms = v peak / 2 ( i load ) rms = ( v load ) rms / rload eff the dynamic power is focused primarily within the output stage driving the load. this value can be calculated as: p dynamic = (v s+ - v load ) rms ( i load ) rms assuming the load is referenced in the middle of the power rails or v supply /2. the clc1008 is short circuit protected. however, this may not guarantee that the maximum junction temperature (+150c) is not exceeded under all conditions. figure 6 shows the maximum safe power dissipation in the package vs. the ambient temperature for the packages available. 0 0.5 1 1.5 2 - 40 - 20 0 20 40 60 80 maximum power dissipation (w) ambient temperature ( c) sot23 - 5 soic - 8 msop - 8 sot23 - 6 figure 6. maximum power derating driving capacitive loads increased phase delay at the output due to capacitive loading can cause ringing, peaking in the frequency response, and possible unstable behavior. use a series resistance, r s , between the amplifer and the load to help improve stability and settling performance. refer to figure 7.
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 12 + - r f input output r g r s c l r l figure 7. addition of r s for driving capacitive loads table 1 provides the recommended r s for various capacitive loads. the recommended r s values result in approximately <1db peaking in the frequency response. the frequency response vs. c l plot, on page 4, illustrates the response of the clcx008. c l (pf) r s () -3db bw (khz) 10pf 0 22 20pf 100 19 50pf 100 12 100pf 100 10.2 table 1: recommended r s vs. c l for a given load capacitance, adjust r s to optimize the tradeoff between settling time and bandwidth. in general, reducing r s will increase bandwidth at the expense of additional overshoot and ringing. overdrive recovery an overdrive condition is defned as the point when either one of the inputs or the output exceed their specifed voltage range. overdrive recovery is the time needed for the amplifer to return to its normal or linear operating point. the recovery time varies, based on whether the input or output is overdriven and by how much the range is exceeded. the clc1008, clc1018, and clc2008 will typically recover in less than 20ns from an overdrive condition. figure 8 shows the clc1008 in an overdriven condition. output voltage (1v/div) input voltage (0.5v/div) time (200ns/div) g = 5 output input figure 8. overdrive recovery layout considerations general layout and supply bypassing play major roles in high frequency performance. c adeka has evaluation boards to use as a guide for high frequency layout and as an aid in device testing and characterization. follow the steps below as a basis for high frequency layout: ? include 6.8f and 0.1f ceramic capacitors for power supply decoupling ? place the 6.8f capacitor within 0.75 inches of the power pin ? place the 0.1f capacitor within 0.1 inches of the power pin ? remove the ground plane under and around the part, especially near the input and output pins to reduce parasitic capacitance ? minimize all trace lengths to reduce series inductances refer to the evaluation board layouts below for more information. evaluation board information the following evaluation boards are available to aid in the testing and layout of these devices: evaluation board # products ceb002 clc1008, clc1018 in sot23 ceb003 clc1008 in soic ceb006 clc2008 in soic ceb010 clc2008 in msop
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 13 evaluation board schematics evaluation board schematics and layouts are shown in figures 8-14. these evaluation boards are built for dual- supply operation. follow these steps to use the board in a single-supply application: 1. short -vs to ground. 2. use c3 and c4, if the -v s pin of the amplifer is not directly connected to the ground plane. figure 8. ceb002 & ceb003 schematic figure 9. ceb002 top view figure 10. ceb002 bottom view figure 11. ceb003 top view figure 12. ceb003 bottom view
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 14 figure 11. ceb006 & ceb010 schematic figure 12. ceb006 top view figure 13. ceb006 bottom view figure 15. ceb010 top view figure 16. ceb010 bottom view
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 15 mechanical dimensions sot23-5 package sot23-6
data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a ?2009-2011 cadeka microcircuits llc www.cadeka.com 16 mechanical dimensions continued soic-8 package msop-8 package 3.0 3.0 3.0 e 2 3 4 5 6 7 dimension "e1" and "e2" does not include inter lead flash or protr usion. e s e/2 2x ccc a b c e b e 2 3 7 2 6 4 d2 a2 a a1 e a e e c e bbb a b c m 4 3 aaa a e1 e2 e1 e detail a a a section a - a b c c1 b1 scale 40:1 t1 t2 plane 0.25mm r1 r l l1 03 02 01 e h e e3 e4 1 2 b d 5 symbol min max
for additional information regarding our products, please visit cadeka at: cadeka.com cadeka, the cadeka logo design, comlinear, and the comlinear logo design are trademarks or registered trademarks of cadeka microcircuits llc. all other brand and product names may be trademarks of their respective companies. cadeka reserves the right to make changes to any products and services herein at any time without notice. cadeka does not assume any responsibility or liability arising out of the application or use of any product or service described herein, except as expressly agreed to in writing by cadeka; nor does the purchase, lease, or use of a product or service from cadeka convey a license under any patent rights, copyrights, trademark rights, or any other of the intellectual property rights of cadeka or of third parties. copyright ?2009-2011 by cadeka microcircuits llc. all rights reserved. cadeka headquarters loveland, colorado t: 970.663.5452 t: 877.663.5452 (toll free) data sheet c omlinear clc1008, clc1018, clc2008 0.5ma, low cost, 75mhz rail-to-rail amplifers rev 2a

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